1. *CLS
Clear Status Command
The *CLS common command clears the status data structures by clearing all event registers and the error queue. It does not clear enable registers. It clears any pending *WAI, *OPC, and *OPC?.
Example:
Send: → *CLS
2. *ESE
*ESE <integer>
*ESE?
Standard Event Status Enable
Sets or reads out the enable bits of the standard event enable register. This enable register contains a mask value for the bits to be enabled in the standard event status register. A bit that is set true in the enable register enables the corresponding bit in the status register. An enabled bit will set the ESB (Event Status Bit) in the Status Byte Register if the enabled event occurs.
Parameters: <integer> = the sum (between 0 and 255) of all bits that are true.
| Event Status Enable Register (1 = enable) | ||
|---|---|---|
| Bit | Weight | Enables |
| 7 | 128 | Reserved |
| 6 | 64 | Reserved |
| 5 | 32 | Reserved |
| 4 | 16 | Reserved |
| 3 | 8 | Reserved |
| 2 | 4 | Reserved |
| 1 | 2 | Reserved |
| 0 | 1 | Operation Complete |
Returned Format: <integer> \n
Example:
SEND → *ESE 36
In this example, command error, bit 5, and query error, bit 2, will set the ESB-bit of the Status Byte if these errors occur.
Example:
SEND → *ESE 1
In this example, bit 0 (Operation Complete event) is enabled. This will set the “ESB” bit of the Status Byte Register when long operation completes.
SEND → *ESE?
Reply: 1
3. *ESR?
Event Status Register.
Reads out the contents of the standard event status register. Reading the Standard Event Status Register clears the register.
Returned Format: <integer> = the sum (between 0 and 255) of all bits that are true.
4. *IDN?
Identification query
Reads out the manufacturer, model, serial number, and firmware level in an ASCii response data element. The query must be the last query in a program message.
Response is <Manufacturer>, <Model> , <Serial Number>, <Firmware Level>.
Example:
SEND → *IDN?
READ ← Pendulum, CNT-104S, 000024, v1.1.1-rc5 2022-11-24
5. *OPC
Operation Complete
The Operation Complete command causes the device to set the operation complete bit in the Standard Event Status Register when all pending selected device operations have been finished.
6. *OPC?
Operation Complete Query.
Operation Complete query. The Operation Complete query places an ASCii character 1 into the device’s Output Queue when all pending selected device operations have been finished.
Returned Format: 1 \n
7. *OPT
Option Identification
Response is a list of all detectable options present in the instrument. When no options are present response is ASCII ‘0’:
<Prescaler option (if present)>, <Oscillator code>, <SW option>, <SW option>…
<Prescaler option> = 3GHz / 10Ghz / 15GHz / 20GHz / 24GHz.
<Prescaler option> represents maximum frequency that a user is allowed to measure using currently installed HW and SW license option.
<Oscillator code> = TCXO / OCXO30 / OCXO40.
8. *RST
Reset
The Reset command resets the counter. The counter settings will be set to the default, except settings in Network, Date/Time, Display groups. All previous commands are discarded and the counter is prepared to start new operations.
Example: *RST
Send: → *RST
9. *SRE
*SRE <integer>
*SRE?
Service Request Enable
The Service Request Enable command sets/reads the service request enable register bits. This enable register contains a mask value for the bits to be enabled in the status byte register. A bit that is set true in the enable register enables the corresponding bit in the status byte register to generate a Service Request.
Parameters: <integer> = the sum (between 0 and 255) of all bits that are true
See table below:
| Service Request Enable Register (1 = enable) | ||
| Bit | Weight | Enables |
| 7 | 128 | OPR, Operation Status |
| 6 | 64 | RQS, Request Service |
| 5 | 32 | ESB, Event Status Bit |
| 4 | 16 | MAV, Message Available |
| 3 | 8 | QUE, Questionable Data/Signal Status |
| 2 | 4 | EAV, Error Available |
| 1 | 2 | Reserved |
| 0 | 1 | Reserved |
Returned Format: <integer>
Where:
<integer> = the sum of all bits that are set.
Example: *SRE 16
In this example, the counter generates a service request when a message is available in the output queue.
10. *STB?
Status Byte Query
Reads out the value of the Status Byte. Bit 6 reports the Master Summary Status bit (MSS), not the Request Service (RQS). The MSS is set if the instrument has one or more reasons for requesting service.
Returned Format:
<Integer> = the sum (between 0 and 255) of all bits that are true. See table below:
| Status Byte Register (1 = true) | |||
| Bit | Weight | Name | Condition |
| 7 | 128 | OPR | Enabled operation status has occurred |
| 6 | 64 | MSS | Reason for requesting service |
| 5 | 32 | ESB | Enabled status event condition has occurred |
| 4 | 16 | MAV | An output message is ready |
| 3 | 8 | QUE | The quality of the output signal is questionable |
| 2 | 4 | EAV | Error available |
| 1 | 2 | Reserved | |
| 0 | 1 | Reserved | |
See also: If you want to read the status byte with the RQS bit, use serial poll.
11. *WAI
Wait-to-continue
The Wait-to-Continue command prevents the device from executing any further commands or queries until execution of all previous commands or queries has been completed.