The status record contains 10 bytes.
Byte 1 | Variable | Meaning |
b0 | XCLK | monitors the external clock |
b1 | XTRG | monitors external start/stop signal |
b2 | START | control signal (as placed by the microprocessor) |
b3 | MEM | swap control: =0 CPU accesses RAM1 and scanning counter <-> RAM2, (as placed by the microprocessor) |
b4 | RST | extended reset signal (as placed by the microprocessor) |
b5 | XI | external/internal time-base clock choice (see below) |
b6 | FS | external/internal time-base clock choice (see below) |
b7 | SOFTCK | software generated time-base output |
Byte 2 | Variable | Meaning |
b0…5 | | not implemented |
b6 | CLEAR | monitors the real state of RUN/STOP, =0 running, =1 stopped |
b7 | SWAP | monitors which RAM is being scanned for output (cf. MEM bit above) |
Byte | Content | Description |
Byte 3 | Card Mask | bit b0…7 set if the corresponding output channel is installed and working properly |
Byte 4 | Ready Flag | if <>0 then the generator may accept the RUN command |
Byte 5,6 | HiAddr | highest occupied RAM address |
Byte 7 | model | 2 or 8-channel model |
Byte 8 | decimal value | firmware revision |
Byte 9 | State message | Meaning |
b0 | XCLK | monitors the external clock |
b1 | XTRG | monitors external start/stop signal |
b2 | START | control signal (as placed by the microprocessor) |
b3 | MEM | swap control: =0 CPU accesses RAM1 and scanning counter <-> RAM2, (as placed by the microprocessor) |
b4 | RST | extended reset signal (as placed by the microprocessor) |
b5 | XI | external/internal time-base clock choice (see below) |
b6 | FS | external/internal time-base clock choice (see below) |
b7 | SOFTCK | software generated time-base output |
Byte 10 | Error Code | Meaning |
kNoError | 0 | |
kNotReady | 1 | |
kFramingError | 2 | serial i/f flags, bits 1..3 |
kNoiseFlag | 4 | |
kOverrun | 8 | |
kOverflow | 16 | data or command |
kNotRecognized | 32 | |
kHardwareError | 64 | |
kTimeOutError | 128 | |
Constant | Value | Meaning |
kStopped | 0 | all bits must be 0 |
kRunning | 1 | |
kRunOut | 2 | STOP command received, finishing the waveform |
kWaitSwap | 4 | one memory bank has been updated and WFG is waiting for the end of waveform to swap the memory banks and gain access to the other memory bank |
kBurst | 8 | the single burst mode is selected |
kPanel | 16 | external triggering selected |
kUndefined | 32 | |
kArmed | 64 | ready to run |
kExpectingData | 128 | current communication not completed |
theMode | Hex value | Meaning |
codeBurst | 0x04 | burst / continuous mode |
codePane | 0x08 | enable external triggering |
theClockChoice | Hex value | Meaning |
codeEclock | 0x60 | 20 MHz internal clock |
codeE2clock | 0x20 | 1 MHz internal clock |
codeSoft | 0x40 | software-controlled internal clock (slow) |
codeExt | 0x00 | external clock |